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Transformation of Intel 10nm Ten generations of Core into M.2: neural Network reasoning

via:快科技     time:2019/8/21 20:11:00     readed:105

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At the Hot Chips 31 chip conference, Intel first announced the architectural details of this special product.

This is the 10nm Ice Lake 10th generation Core processor.

This is based on the Ice Lake remodeled M.2 NNP-I

Under the guidance of AI Everywhere, Intel is working on a variety of AI hardware and software solutions, including CPU, GPU, FPGA, ASIC and so on.

This new NNP-I code is"Spring Hill" (thermal hills), light AI reasoning for the data centerThe M.2 expansion card can benefit from the ultra-small area of ​​the 10nm chip.

Based on the original 10nm Ice Lake processor, Intel removed two CPU computing cores, GPU core graphics cards, and added 12 inference computing engines (ICE), which are based on hardware synchronization, and each ICE has its own 4MB. SRAM cache to reduce data transfer and share a coherent interconnect with two CPU cores, 24MB L3 cache.

Intel also designed aDeep Learning Computing Grid (DL Compute Grid)As a tensor engine, it is interconnected with SRAM and VP6 DSP through data and control bus. It supports FP16, INT8, INT4, INT2, INT1 and other types of operations. The DSP can also handle some special algorithms.

CPU core is stillThe standard Sunny Cove architecture supports the AVX-512, VNNI instruction set to accelerate convolutional neural networks.The fully inherited FIVR voltage regulator dynamically adjusts power consumption to give priority to the most needed hardware units.

Built inTwo LPDDR4X memory controllersIt integrates and packages a memory chip with a transmission bandwidth of 4.2 GT/s (68 GB/s) and supports in-band ECC, but the capacity is not announced.

The communication channel between NNP-I and the system isPCIe 3.0 x4 or PCIe 3.0 x8Bandwidth is not a problem, but it does not use the NVMe protocol, just the standard PCIe interface.

TDP power consumption is very flexible.Low to 10W and up to 50W, depending on performance needs, as an expansion card is not limited by M.2 15W. According to different power consumption configurations,The INT8 integer energy efficiency is in the range of 2-4.8 TOP/s.

According to Intel, the ResNet500 runs at 10W TDP power consumption, with a number of inferences of up to 3,600 per minute, which equals an efficiency of up to 4.8 TOP/s, which is still quite high.

Software,Intel will provide the corresponding development tools to help the load transfer the reasoning work to the accelerator completely. After the completion, the Xeon CPU will be notified to the next step, so that the Xeon CPU no longer needs to communicate with each other and transfer data through the PCIe bus and other accelerators. , greatly saving computing resources and power consumption.

The Intel NNP-I is currently in trial production and will be mass-produced and shipped at the end of the year, and two new generations are under design...

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