Intel has launched x86 with a high profile through Lakefield products big.LITTLE Hybrid architecture. It is said that the 12th generation core alder Lake wants to explore 16 cores.
It seems that AMD is not idle here big.LITTLE It's also doing the layout.
Foreign users dug up AMD patent documents showIt outlines a new subset of instruction sets for low-power operations。 Specifically, it allows a subset of instructions to be executed on larger and fully functional processing cores optimized for higher performance, while the second instruction subset is run on a smaller simplified core designed to improve power efficiency. The patent also outlines the method that the core uses shared memory to speed up the transmission of threads based on certain variables.
In practice,The large kernel will perform performance sensitive workloads, while the smaller cores will perform light loads. When a core is not busy, it may be turned off, further reducing power consumption.
It is argued that the method described in AMD patent seems to allow the processor to independently run the corresponding type of thread on each cluster according to the instructions supported by the kernel. However, this design is not limited to CPU, GPU and DSP.
Considering that TSMC has been making efforts in packaging these years, amd may consider taking out the so-called big.LITTLE Hybrid architecture products.
The following is part of the patent document for reference