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TSMC joins Google and AMD to study 3D packaging, both of which will become the first batch of customers

via:Expreview超能网     time:2020/11/28 21:00:35     readed:182

With the production of 7 nm and 5 nm processes in recent years, the new process has brought considerable revenue to TSMC. Of course, they have invested a lot of energy and funds to develop new processes to maintain their leading edge. The last two days TSMC held a completion ceremony for nm new plant in Tainan Science Industrial Park, their next three plants.

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According to Nikkei Asia, TSMC is cooperating with Google to promote the production of 3D chip process, and AMD is also involved. It is said that it is to overcome some silicon manufacturing problems. It is certain that Google and AMD will become the first users of TSMC's advanced 3D chip process. They are preparing design for the new process and helping TSMC test and certify the process 。

This 3D chip process should refer to the wafer on wafer (wow) 3D chip packaging process of TSMC. They are developing it in chip packaging factories in Miaoshi. Different from the current 2.5D packaging method of TSMC cowos, it realizes real 3D packaging through TSV silicon perforation technology, and Intel's forros Similar to 3D packaging, it can stack multiple chips layer by layer like building a house, and even seal chips with different processes, structures and uses.

Google estimates that it plans to use TSMC's 3D packaging technology to produce a new generation of TPU AI chips, while amd may use more, CPU, GPU and various SOC,AppleIt's a surprise not to be on this list, but I don't know if it will be the first batch of users.

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